Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
2005-09-21
2009-02-17
Chase, Shelly A (Department: 2112)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
C714S800000
Reexamination Certificate
active
07493551
ABSTRACT:
The method and device include determining by removing N−N, rows from an original generator matrix (G) defining the LDPC code and having N rows and N−M columns for obtaining a generator sub-matrix (G1) having N−M columns and N1rows. The method also includes delivering by receiving an input data vector of size N−M and multiplying the input vector with the generator sub-matrix for obtaining the punctured encoded code word.
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Sesia et al., “The Throughput of an LDPC-Based Incremental-Redundancy Scheme over Block-Fading Channels”, ITW2002, Banglore, India; Oct. 20-25, 2002; pp. 15-18; XP010620570.
Wilson, “Linear Block Codes”, Digital Modulation and Coding, 1996, pp. 411-493, XP 002275914.
Berens Friedbert
Chalard Laurent
Allen Dyer Doppelt Milbrath & Gilchrist, P.A.
Chase Shelly A
Jorgenson Lisa K.
STMicroelectronics N.V.
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