Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
2005-12-02
2009-10-06
Baderman, Scott T (Department: 2112)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
C714S774000, C714S712000
Reexamination Certificate
active
07600172
ABSTRACT:
A device for decoding an incident FEC encoded packet of data within an ARQ scheme. The device includes a processor or processing means for performing successive decoding processes of successive intermediate FEC code encoded packets related to the incident FEC code encoded packet. The processor or processing means includes a FEC decoder. The processor or processing means included a determination unit or determination means for determining initial decoding conditions from the FEC code decoding result concerning the preceding intermediate FEC code encoded packet and from the current intermediate FEC code encoded packet, and the FEC decoder is for performing the current FEC code decoding using the initial decoding conditions.
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Berens Friedbert
Chalard Laurent
Messina Ettore
Tanrikulu Stèphane Erkan
Allen Dyer Doppelt Milbrath & Gilchrist, P.A.
Alphonse Fritz
Baderman Scott T
Jorgenson Lisa K.
STMicroelectronics N.V.
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