Error detection/correction and fault detection/recovery – Pulse or data error handling – Testing of error-check system
Reexamination Certificate
2000-08-16
2003-12-02
Chung, Phung M. (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Testing of error-check system
Reexamination Certificate
active
06658606
ABSTRACT:
TECHNICAL FIELD
The present invention discloses a method and device for checking an error control unit in a circuit.
BACKGROUND OF THE INVENTION
In many digital circuits it is highly important that their serviceability can be checked reliably. The operational reliability of such digital circuits, for example, must be acknowledged definitely when they are applied in safety-related circuits; for example, in the construction of automobiles. For this reason, digital circuits frequently include error control units that observe the performance of the digital circuits and generate an error signal when a state indicating an error occurs. Thus, for example, it can be determined whether redundant components run synchronously, and an error signal would be generated if the data in the redundant components were not the same. In the same way, signals can be picked up at individual points in the circuit and queried about non-permissible states or similar conditions. The error control also can monitor signals on interconnecting cables, e.g. on a system bus, and generate an error signal when a state indicating an error occurs.
A process for automatically controlling the execution of a sequence of orders in a microprocessor is described in the journal
Electronique,
issue no. 24, January 1993, pp. 53-59. In this process the time period for executing a sequence of orders is specified and compared to a preset reference time. An external circuit WD which receives a pulse for the reset is provided for defining the time period for executing the sequence of orders. If the time needed for carrying out the orders is too long or too short, if the reset pulse is generated not at all, too early or too late, then the executing time will deviate from the reference time and the occurrence of an error can be indicated immediately. In addition, a test routine is described for this process, by means of which the operational reliability of the circuits can be checked. For this purpose, software is applied to suppress reset pulses to the circuit WD, causing the duration of the program run to be extended in a non-permissible way. Then it is checked whether an error can be detected. In order to ensure that this “intentional” error is not interpreted as an actual error from outside, the method provides, on the one hand, for a reset pulse to be emitted again and, on the other hand, for a filtering process to be carried out with the aid of a filtering device, so that an error signal is generated only on the basis of an error that is recognized as a relevant error.
Since errors occur relatively seldom in digital circuits, corresponding error control units become active comparatively seldom. Hence, it cannot be proven definitively whether the error control unit is working properly.
SUMMARY OF THE INVENTION
The object of the present invention is a method and device for checking an error control unit, wherein these have a simple design and can detect different error conditions.
Before individual embodiments of the invention are described on the basis of the drawings, the terminology used in this application will be explained so as to avoid any misunderstandings. The above-mentioned safety-related circuit whose operational reliability is to be checked is referred to as “circuit” or “digital circuit”. When it does not work properly, this is referred to as an “error”. The circuit is monitored by an “error control (unit)”. When an error occurs, the error control unit emits an “error signal”. According to the present invention, a “method for checking” or a “device for checking” the proper functioning of the error signal or the error control unit generating the signal is applied. It should be noted that the monitored circuit on the one hand and the error control unit on the other hand do not necessarily have to be set up discretely, i.e. separately; for example, they can be components of a microprocessor and may not be distinguishable physically. The error control unit emits the above-mentioned error signal when a state indicating an error in the circuit occurs, with the error control unit being checked according to the present invention. If the check of the error control unit according to the present invention shows that the error control unit itself is defective (since it does not emit the error signal at all or not correctly), the checking device according to the present invention or the checking method according to the present invention generates an “alarm signal”.
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Charpentier: “Le Chien de Garde Applique au Microprocesseur”, Electronique, vol. 24, p. 53-59 (1993) (No English Translation).
English Translation of the International Preliminary Examiner Report for Application PCT/EP98/06802.
“A Process for Automatically Controlling the Execution of a Sequence of Orders in a Microprocessor”, Journal Electronique, Issue No. 224, Jan. 1993, pp. 53-59 No English Translation.
“Le Chien De Garde Applique Au Microprocesseur”, Journal Electronique, Jan. 1993, No. 24, Paris, France, pp. 53-59 No English Translation.
Fey Wolfgang
Link Leonard
Chung Phung M.
Continental Teves AG & Co. OHG
Rader & Fishman & Grauer, PLLC
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