Electrical computers and digital processing systems: memory – Storage accessing and control – Access timing
Reexamination Certificate
2005-05-12
2008-08-12
Sough, Hyung (Department: 2188)
Electrical computers and digital processing systems: memory
Storage accessing and control
Access timing
Reexamination Certificate
active
07412582
ABSTRACT:
A device for burst reading/writing memory data includes a memory module and a north bridge chipset. The device is used for executing a power on self test (POST). The memory module has a plurality of memory cells and the north bridge chipset includes a programmable register module and a memory module controller, wherein the programmable register module stores at least one set of default information. The memory module controller performing burst read/write on the memory cells according to the default information stored in the programmable register module.
REFERENCES:
patent: 5522050 (1996-05-01), Amini et al.
patent: 5732241 (1998-03-01), Chan
patent: 7075822 (2006-07-01), Elmhurst et al.
patent: 2005/0089106 (2005-04-01), Cho et al.
Chu Hsiu Ming
Ho Kuan-Jui
Ahmed Hamdy S
Birch & Stewart Kolasch & Birch, LLP
Sough Hyung
VIA Technologies Inc.
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