Method and device for array threshold voltage control by...

Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material

Reexamination Certificate

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C438S296000, C438S435000, C257S510000

Reexamination Certificate

active

06348394

ABSTRACT:

BACKGROUND OF THE INVENTION
Trench isolation has been used in the semiconductor industry to reduce circuit topography and better isolate adjacent semiconductor devices. In a typical process of forming shallow trench isolation (STI), a nitride liner is formed on a thermally oxidized film on the surface of a shallow trench. The nitride liner has been shown to be a highly effective oxygen diffusion barrier. Thus, the nitride liner may be formed to prevent oxidation of a silicon sidewall of a collar region of a storage trench.
However, there are problems with the nitride liner as currently formed. The nitride liner has been shown to be a source of charge trapping, which leads to unacceptable levels of junction leakage in support circuitry. The charge trapping occurs at the interface of the nitride liner and the oxide used to fill the trenches. Many methods of handling charge trapping have been proposed. Most of the methods address the problem by reducing the charge trapped to improve isolation, rather than utilizing the charge to improve the device's operation. For example, U.S. Pat. No. 5,747,866 to Ho et al. describe a structure which limits charge trapping. Ho et al. describe a crystalline RTN nitride liner deposited at greater than 1050° C. to lower the density of trapping centers.
Another problem in forming the nitride liner is the process window for the nitride layer is extremely narrow. The nitride liner makes it easy for attachment to attack the near-top part of the trench and the near-corner part of the active layer during subsequent process steps. The nitride liner is inevitably etched when a pad nitride film is etched with hot phosphoric acid. It is difficult to control this isotropic etching of the near corner part of the active region. This, in turn, greatly affects the off-current of the device. The off current depends upon the conductivity of the corner parts of the active region, due to the reduced width of the semiconductor device and to the electric field concentrated at the corner parts of the active region. The off-current is influenced a great deal by the geometric shapes of the corner parts.
Thus, there is a need for a semiconductor device and manufacturing process that addresses the issues of charge trapping and off-current currently associated with forming the nitride liner.
SUMMARY OF THE INVENTION
A semiconductor device and method of manufacturing thereof are provided. A trench is formed in a semiconductor substrate. A thin oxide liner is preferably formed on surfaces of the trench. A nitride liner is formed in the trench. Charge is trapped in the nitride liner. In a preferred embodiment, the trench is filled with an oxide by an HDP process to increase the amount of charge trapped in the nitride liner. Preferably, the oxide fill is formed directly on the nitride liner.


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