Electrical computers and digital data processing systems: input/ – Access arbitrating – Centralized arbitrating
Reexamination Certificate
2006-08-22
2006-08-22
Perveen, Rehana (Department: 2112)
Electrical computers and digital data processing systems: input/
Access arbitrating
Centralized arbitrating
C710S244000, C710S116000
Reexamination Certificate
active
07096291
ABSTRACT:
A method for arbitrating a bus grant among a plurality of master devices for access to a shared bus is disclosed. The method includes the steps of starting to accumulatively count time in response to a data transfer request signal outputted by one of the master devices for requesting a data transfer, and re-estimating a bus-utility condition for the one of the master devices to access to the shared bus when a preset threshold value of time is counted up. In addition, an arbiter for a bus grant among a plurality of master devices for access to a shared bus is disclosed. The arbiter is characterized by including a plurality of timer devices in communication with the plurality of master devices, respectively.
REFERENCES:
patent: 5168568 (1992-12-01), Thayer et al.
patent: 6085274 (2000-07-01), Seeman
patent: 6412030 (2002-06-01), Adusumilli
patent: 6412048 (2002-06-01), Chauvel et al.
patent: 6763415 (2004-07-01), Tischler
patent: 2003/0177296 (2003-09-01), Kurth
Madson & Austin
Perveen Rehana
Via Technologies Inc.
Vu Trisha
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