Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
1996-07-22
2003-02-18
Thai, Tuan V. (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S118000, C711S125000
Reexamination Certificate
active
06523095
ABSTRACT:
FIELD OF THE INVENTION
Generally, the present invention relates to instruction decode and execution, and specifically to conditional decoding of instructions.
BACKGROUND OF THE INVENTION
The JAVA byte code interpreter has a number of instructions having normal and quick versions. The first time a normal opcode of one of these instructions is encountered, it triggers a number of checks. Each of these checks takes a certain amount of overhead, generally in the form of time. The quick counter part of a normal instruction executes the instructions function without all of the associated overhead.
When a JAVA code interpreter executes an instruction opcode that has a quick version, it overwrites the memory location containing the instruction with the alternative quick version as shown in prior art FIG.
1
. As a result, subsequent fetches from the memory location execute the quick version, and hence do not repeat the checks required by the normal version of the opcode.
One problem associated with such overriding of existing code is the additional overhead of having to write back modified instructions to memory. When a cache is used, not only does the instruction in the cache get modified, but at some point, when the cache line is flushed, the entire cache line may have to be written back to memory. Depending on the cache configuration, it may be necessary to update the external memory in order to match the cache whenever a change in the cache occurs, known as write through mode. By requiring modified code to be moved back to memory causes an increased usage of memory bandwidth, hence slowing down overall system operation. In addition the need to write over an existing opcode also requires additional steps which can reduce system performance. Therefore, it would be beneficial to eliminate the need to perform the overwrite of a normal opcode with a quick opcode.
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Motorola Inc.
Thai Tuan V.
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