Method and data processing system for dynamically accessing both

Details Method and data processing system for dynamically accessing both Method and data processing system for dynamically accessing both

1997-09-08

1999-05-25

Chan, Eddie P.

Electrical computers and digital processing systems: memory

Address formation

Slip control, misaligning, boundary alignment

711202, 711211, 395898, 395380, G06F 700

Patent

active

059078650

ABSTRACT:
A method and apparatus is used to allow big-endian data and little-endian data to be read from memory in a dynamic manner. A multiplexer controller (18) is provided size bits and two low order address bits A0 and A1 as control signals from a CPU (16). A0 is used by the controller (18) to distinguish between little-endian reads and big-endian reads for both 16-bit halfword accesses and 32-bit word accesses. Using the control signals from the CPU (16), the controller (18) provides ten control signals to a multiplexer 20. One of signals A-D are enabled for byte accesses, one of signals E'-G' are enabled for big-endian halfword or word accesses, and one of the signals E"-G" are enabled for little-endian halfword or word accesses. The multiplexor switches the external data from big-endian or little-endian to a common CPU-internal format while also aligning data reads for byte and halfword accesses in response to the ten control signals.

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