Method and control system for recognizing a fault when...

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability

Reexamination Certificate

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Reexamination Certificate

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07607050

ABSTRACT:
The invention relates to a method for recognizing a fault when processing input data in a processing system to form a data packet which contains output data and a test data item, the test data item being formed in order to confirm the validity of the output data. The following method steps are executed serially: The output data ascertained on the basis of the input data in line with a first processing method. The test data item is ascertained on the basis of the input data in line with a second processing method, with intermediate output data being ascertained on the basis of the input data in line with a third processing method, and a test data item is determined from the ascertained intermediate output data in line with a fourth processing method, wherein the first processing method and the third processing method implement the same function by different routes. A fault is recognized in the processing system if the validity of the output data cannot be confirmed by the test data item.

REFERENCES:
patent: 5506958 (1996-04-01), Myran
patent: 6704371 (2004-03-01), Hishiki et al.
patent: 6990616 (2006-01-01), Botton-Dascal et al.
patent: 7423975 (2008-09-01), Johnson et al.
patent: 19532639 (1997-02-01), None
patent: 0287302 (1988-10-01), None
patent: 0744693 (1996-11-01), None
Dipl.-Ing. Jurgen Nikolaizik et al., “Fehlertolerante Mikrocomputersysteme”,Berlin; Verlag Technik GmbH Berlin, 1990, pp. 23-67.

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