Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture
Reexamination Certificate
2006-02-14
2006-02-14
Auve, Glenn A. (Department: 2112)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus interface architecture
C710S310000, C710S260000
Reexamination Certificate
active
07000058
ABSTRACT:
A method for transmitting digital data, which is continued in data frames of variable lengths, from a first data bus to a second data bus, which is operated asynchronously with respect to the first data bus and is controlled by a microprocessor. The method has the below listed steps. The data is written from the first data bus to a memory of a settable size. A memory control unit informs the microprocessor, in the form of an interrupt, when the memory is full or when the end of a data frame is reached. The microprocessor determines from the memory control unit the quantity of data to be read from the memory, reads the data from the memory, and sets the size of the memory. Finally, the microprocessor acknowledges reception of the data block to the memory control unit.
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Auve Glenn A.
Greenberg Laurence A.
Infineon - Technologies AG
Lee Christopher E.
Locher Ralph E.
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