Method and computer program for incremental placement and...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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Details

C716S030000, C716S030000

Reexamination Certificate

active

07415687

ABSTRACT:
A method of placing and routing an integrated circuit design includes generating an initial placement and routing for at least a portion of an integrated circuit design. The initial placement and routing of the integrated circuit design is analyzed to find a critical location and is partitioned into a series of nested shells. Each shell surrounds the critical location and each preceding shell. An ordering of the shells and at least one of a timing constraint and an area constraint are selected for each shell. Each shell is placed and routed in the order selected according to the timing constraint and area constraint.

REFERENCES:
patent: 2004/0117744 (2004-06-01), Nation et al.
patent: 2004/0230933 (2004-11-01), Weaver et al.
patent: 2005/0010889 (2005-01-01), Barnes

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