Cleaning compositions for solid surfaces – auxiliary compositions – Cleaning compositions or processes of preparing – For cleaning a specific substrate or removing a specific...
Reexamination Certificate
2000-09-27
2002-05-14
Delcotto, Gregory (Department: 1751)
Cleaning compositions for solid surfaces, auxiliary compositions
Cleaning compositions or processes of preparing
For cleaning a specific substrate or removing a specific...
C510S176000, C510S499000, C510S500000, C510S255000, C510S257000, C510S264000, C510S265000
Reexamination Certificate
active
06387859
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to methods and cleaner compositions for forming residue free layers within microelectronic fabrications. More particularly, the present invention relates to methods and cleaner compositions for forming copper containing residue layer free microelectronic layers in the presence of copper containing conductor layers within microelectronic fabrications.
2. Description of the Related Art
Microelectronic fabrications are formed from microelectronic substrates over which are formed patterned microelectronic conductor layers which are separated by microelectronic dielectric layers.
As microelectronic fabrication integration levels have increased and patterned microelectronic conductor layer dimensions have decreased, it has become increasingly common within the art of microelectronic fabrication to employ when forming patterned microelectronic conductor layers within microelectronic fabrications, such as but not limited to patterned microelectronic conductor contact layers and patterned microelectronic conductor interconnect layers within microelectronic fabrications, copper containing conductor materials.
Copper containing conductor materials are desirable when forming patterned microelectronic conductor layers within microelectronic fabrications since copper containing conductor materials typically possess enhanced electrical properties in comparison with other conductor materials, such as but not limited to aluminum containing conductor materials and tungsten containing conductor materials, which may alternatively be employed for forming patterned microelectronic conductor layers within microelectronic fabrications.
While copper containing conductor materials are thus desirable in the art of microelectronic fabrication for forming patterned microelectronic conductor layers within microelectronic fabrications, copper containing conductor materials are not without problems within the art of microelectronic fabrication for forming patterned microelectronic conductor layers within microelectronic fabrications. In that regard, insofar as copper containing conductor materials are often difficult to pattern while employing reactive ion etch (RIE) plasma etch methods as are otherwise conventional for forming patterned microelectronic conductor layers within microelectronic fabrications, such patterned microelectronic conductor layers when formed within microelectronic fabrications of copper containing conductor materials are often formed employing damascene methods, including but not limited to dual damascene methods.
As is understood by a person skilled in the art, within a damascene method a blanket copper containing conductor layer is formed into an aperture formed within a patterned microelectronic layer, where the aperture typically comprises a via and/or trench defined within a patterned microelectronic dielectric layer, and the excess of the blanket copper containing conductor layer above the aperture is planarized while employing a chemical mechanical polish (CMP) planarizing method to form within the aperture a chemical mechanical polish (CMP) planarized patterned copper containing microelectronic conductor layer, such as a chemical mechanical polish (CMP) planarized patterned copper containing microelectronic conductor stud layer and/or a chemical mechanical polish (CMP) planarized patterned copper containing microelectronic conductor interconnect layer within the corresponding via and/or the corresponding trench defined by the patterned microelectronic dielectric layer.
While such chemical mechanical polish (CMP) planarizing methods are thus useful for forming within microelectronic fabrications chemical mechanical polish (CMP) planarized patterned copper containing microelectronic conductor layers within microelectronic fabrications, such chemical mechanical polish (CMP) planarizing methods in turn are also not entirely without problems in the art of microelectronic fabrication for forming chemical mechanical polish (CMP) planarized patterned copper containing microelectronic conductor layers within vias and/or trenches defined by patterned microelectronic dielectric layers within microelectronic fabrications. In that regard, it is also known in the art of microelectronic fabrication that a patterned copper containing microelectronic conductor layer, when formed employing a chemical mechanical polish (CMP) planarizing method, is often formed while providing a copper containing chemical mechanical polish (CMP) residue layer upon at least a portion of the microelectronic fabrication adjoining the patterned copper containing microelectronic conductor layer. Similarly, when etching through a passivation dielectric layer subsequently formed upon the chemical mechanical polish (CMP) planarized patterned copper containing microelectronic conductor layer a via to reach the chemical mechanical polish (CMP) planarized patterned copper containing microelectronic conductor layer formed employing the chemical mechanical polish (CMP) planarizing method, there is also often formed a copper containing via etch residue layer upon at least the sidewalls of the via. Such copper containing chemical mechanical polish (CMP) residue layers and copper containing via etch residue layers are in turn undesirable in the art of microelectronic fabrication since they often compromise the functionality or reliability of a microelectronic fabrication within which they are formed.
It is thus towards the goal of forming within the art of microelectronic fabrication microelectronic fabrications having formed therein copper containing residue layer free microelectronic layers in the presence of copper containing conductor layers, such as but not limited to copper containing via etch residue layer free layers and copper containing chemical mechanical polish (CMP) residue layer free microelectronic layers in the presence of copper containing conductor layers, that the present invention is directed.
Various methods and materials have been disclosed in the art of microelectronic fabrication for forming microelectronic fabrications and microelectronic structures with desirable properties within the art of microelectronic fabrication.
For example, Ng et al., in
“Synthesis of Some Carbonyl Derivatives of BTA and Determination of Their Inhibitive Properties for Copper in
3%
NaCl Solution
,” Corrosion Science and Protection Technology, Vol. 9(3), July 1997, pp. 201-04, discloses various nitrogen substituted benzotriazole (BTA) derivatives formed incident to reaction of benzotriazole (BTA) with various acid chlorides (i.e., C1-C4 n-alkyl acid chlorides, t-butyl acid chloride, p-tolyl acid chloride and glutaryl di-acid chloride). The various nitrogen substituted benzotriazole (BTA) derivatives typically exhibit improved corrosion protection for copper surfaces in comparison with the nitrogen unsubstituted benzotriazole (BTA) parent material from which they are derived.
In addition, Kadomura, in U.S. Pat. No. 5,281,304, discloses a method for forming within a microelectronic fabrication from a blanket copper containing conductor layer formed within the microelectronic fabrication a patterned copper containing conductor layer formed within the microelectronic fabrication, while avoiding oxidation of the patterned copper containing conductor layer when forming the patterned copper containing conductor layer from the blanket copper containing conductor layer within the microelectronic fabrication. The method employs: (1) converting the surface of the blanket copper containing conductor layer to an anti-oxidation copper containing material prior to forming the patterned copper containing conductor layer from the blanket copper containing conductor layer; and (2) de-converting the anti-oxidation copper containing material to copper after forming the patterned copper containing conductor layer from the blanket copper containing conductor layer.
Further, Brusic et al., in U.S. Pat. No. 5,316,5573, disclose a corrosion protecting mater
Chartered Semiconductor Manufacturing Ltd.
Delcotto Gregory
Pike Rosemary L. S.
Saile George O.
Stanton Stephen G.
LandOfFree
Method and cleaner composition for stripping copper... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method and cleaner composition for stripping copper..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and cleaner composition for stripping copper... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2878776