Static information storage and retrieval – Read/write circuit – Testing
Patent
1991-05-03
1994-08-30
Ham, Seungsook
Static information storage and retrieval
Read/write circuit
Testing
365222, G11C 700, G11C 2900
Patent
active
053434307
ABSTRACT:
A dynamic memory device includes a refresh counter, a row circuit, and a column AV5VpVcircuit. The dynamic memory device has a screening refresh mode for activating a circuit block in response to a signal other than a refresh address signal externally supplied, the circuit block including a refresh counter, row circuit, and column circuit.
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patent: 4672583 (1987-06-01), Nakaizumi
patent: 4934826 (1990-06-01), Miyatake et al.
patent: 4943960 (1990-07-01), Komatsu et al.
patent: 4984210 (1991-01-01), Kumanoya et al.
patent: 5016220 (1991-05-01), Yamagata
patent: 5031147 (1991-07-01), Maruyama et al.
patent: 5151881 (1992-09-01), Kajigaya et al.
patent: 5157629 (1992-10-01), Sato et al.
Co-pending U.S. patent application Ser. No. 544,614 Filed Jun. 27, 1990.
Ham Seungsook
Kabushiki Kaisha Toshiba
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