Method and circuitry for refreshing a flash electrically erasabl

Details Method and circuitry for refreshing a flash electrically erasabl Method and circuitry for refreshing a flash electrically erasabl

1992-12-16

1994-11-15

LaRoche, Eugene R.

Static information storage and retrieval

Read/write circuit

Data refresh

365185, 365900, G11C 700

Patent

active

053654862

ABSTRACT:
A method and apparatus for flash EEPROM refresh is provided in which the control gate of a particular memory cell is read at an elevated control gate voltage (42). It is next determined whether the cell has been programmed (44). If the cell has been programmed, then the next memory cell is read (46). If it is initially determined that the cell has not been programmed (44), then the particular memory cell is read at a lowered control gate voltage (48). It is then finally determined whether the cell has been programmed (50). If it is determined that the cell has not been programmed, then the next cell is read (46). If it is determined that the cell has been programmed (50), then the memory is refreshed (52). After refresh, the next memory cell is read (46).

REFERENCES:
patent: 5031147 (1991-07-01), Maruyama et al.
patent: 5200920 (1993-04-01), Norman et al.
patent: 5237535 (1993-08-01), Mielke et al.
patent: 5239505 (1993-08-01), Fazio et al.

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