Method and circuit for verifying and eventually substituting...

Static information storage and retrieval – Read/write circuit – Differential sensing

Reexamination Certificate

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C365S185200

Reexamination Certificate

active

11121615

ABSTRACT:
A circuit verifies and substitutes a defective reference cell of a memory device that includes at least one reference current path including the reference cell and a decoding transistor connected in series. The circuit includes at least one redundant reference current path identical to the at least one reference current path and in parallel therewith. A connection circuit connects in a mutually exclusive way control terminals of the decoding transistor and reference cell of the at least one reference current path to a node or control terminals of the decoding transistor and reference cell of the at least one redundant reference current path to the node. The connecting is based upon a logic signal. A window comparator is coupled to the reference current path for comparing a current therein with a pair of upper and lower thresholds, and outputs the logic signal for the connection circuit based upon the comparison.

REFERENCES:
patent: 5859796 (1999-01-01), Cleveland
patent: 5973959 (1999-10-01), Gerna et al.
patent: 6639837 (2003-10-01), Takano et al.
patent: 6801466 (2004-10-01), Giove et al.
patent: 6845052 (2005-01-01), Ho et al.

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