Method and circuit for transmitting a memory clock signal

Details Method and circuit for transmitting a memory clock signal Method and circuit for transmitting a memory clock signal

2011-02-08

2011-02-08

Nguyen, Hiep T (Department: 2187)

Electrical computers and digital processing systems: memory

Storage accessing and control

Access timing

Reexamination Certificate

active

07886122

ABSTRACT:
Embodiments of the invention generally provide a method and apparatus for transmitting and receiving clock signals. In one embodiment, the method includes receiving, at a memory device, a first clock signal and a second clock signal. The frequency of the first clock signal may be less than the frequency of the second clock signal. The method further includes performing two or more data access operations using the second clock signal. One of the two or more data access operations may include a read operation and one of the two or more data access operations may include a write operation. The method also includes performing a command processing operation using the first clock signal.

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JEDEC Standard, Double Data Rate (DDR) SDRAM Specification, JESD79, Release 1, Jun. 2000, USA.

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