Static information storage and retrieval – Read/write circuit – Including reference or bias voltage generator
Patent
1995-05-04
1996-07-02
Zarabian, A.
Static information storage and retrieval
Read/write circuit
Including reference or bias voltage generator
36518518, 36518907, G11C 1140
Patent
active
055329640
ABSTRACT:
A method and circuit programs and automatically verifies the programming of selected EEPROM cells without alternating between programming and reading modes like prior art methods and circuitry. The circuitry includes a programming circuit and a bit line voltage regulation circuit. The programming circuit further includes a novel sense amplifier which unlike prior art sense amplifiers, is operable during both cell reading and programming modes. Included in the sense amplifier are two current providing circuits. A first circuit provides current to a selected EEPROM cell which is sufficient for reading the programmed state of the cell, and a second circuit which automatically provides additional current when required, for programming the cell. The sense amplifier detects when programming of a selected EEPROM cell has completed and causes programming of that cell to be terminated. The voltage regulation circuitry regulates the bit line voltage to the selected EEPROM cell's drain electrode. The programming circuitry, including the sense amplifier, and voltage regulation circuitry are shown to be shared between a plurality of bit lines through a bit line selection circuit.
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"An Improved Method for Programming a Word-Erasable EEPROM," by Torelli et al., vol. LII, N.6 Nov.-Dec. 1993, pp. 487-494.
"Non-Volatile Memories," by Raul-Adrian Cernea et al., ISSOC paper, Session 10 (1989).
Cernea Raul-Adrian
Lee Douglas J.
Mehrotra Sanjay
SanDisk Corporation
Zarabian A.
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