Electronic digital logic circuitry – Interface – Supply voltage level shifting
Reexamination Certificate
2007-04-03
2007-04-03
Le, Don (Department: 2819)
Electronic digital logic circuitry
Interface
Supply voltage level shifting
C326S083000, C326S026000
Reexamination Certificate
active
10611585
ABSTRACT:
Systems and methods are disclosed for reducing or eliminating hot carrier injection stress in circuits. In one embodiment, the present invention relates to an integrated circuit comprising an IO PAD, an output circuit coupled to at least the IO PAD and a stress circuit. The stress circuit is coupled to at least the output circuit and is adapted to limit a high voltage across the output circuit when the output circuit is enabled, thereby reducing stress on the output circuit. In one embodiment, the stress circuit comprises at least one transistor device (a p-channel device or two stacked p-channel devices, for example) and the output circuit comprises a transistor device (an n-channel device or two stacked n-channel devices).
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Benzer Darrin
Elio Robert
McFarland Duncan
Oertle Kent
Broadcom Corporation
Le Don
McAndrews Held & Malloy Ltd.
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