Method and circuit for recycling charge

Electronic digital logic circuitry – Interface – Current driving

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326 88, 326 26, 326 27, 326 17, 326121, 326119, 326 91, 326 92, 327313, 327321, 327328, H03K 19013, H03K 19094, H03K 508

Patent

active

060972203

ABSTRACT:
Briefly, in accordance with one embodiment of the invention, an integrated circuit includes: two transistors coupled together in the integrated circuit so that upon the application of complementary voltage signals, electrical charge is substantially evenly distributed between output nodes. Briefly, in accordance with one more embodiment of the invention, an integrated circuit includes: a charge recycle circuit including two transistors. Briefly, in accordance with another embodiment of the invention, an integrated circuit includes: a charge recycle circuit including a first and second transistor coupled so as to respectively receive complementary voltage signals at the control voltage port of the first and second transistors. The transistors have a threshold voltage level different from the threshold voltage level of other transistors coupled to the charge recycle circuit. Briefly, in accordance with still another embodiment of the invention, a method of recycling charge includes: applying complementary voltage signals to first and second transistors coupled in an integrated circuit so as to substantially evenly distribute electrical charge between the output nodes.

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Bai-Sun Kong, Joo-Sun Choi, Seog-Jun Lee, Kwyro Lee; "Charge Recycling Differential Logic (CRDL) for Low Power Application", IEEE Journal of Solid State Circuits, vol. 31, No. 9, Sep. 1996, pp. 1267-1276.

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