Method and circuit for reconfiguring a buffer

Electronic digital logic circuitry – Multifunctional or programmable – Having details of setting or programming of interconnections...

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Details

326 21, 326 82, H03K 190175

Patent

active

057368678

ABSTRACT:
A reconfigurable buffer circuit capable of producing an active high or an active low output signal in accordance with a stored control parameter that is input to the buffer circuit. The reconfigurable buffer circuit has an output buffer that outputs a buffered output signal corresponding to an input signal. The reconfigurable buffer control circuit also has a control circuit that receives and stores an inputted control parameter, and receives at least one control signal from a control signal source. Based on the stored control parameter and the at least one control signal received from the control signal source, the control circuit produces the input signal.

REFERENCES:
patent: Re34916 (1995-04-01), Sweeney
patent: 4612459 (1986-09-01), Pollachek
patent: 5402014 (1995-03-01), Ziklik et al.
patent: 5508650 (1996-04-01), Grimm et al.

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