Method and circuit for protection of sensitive data in scan...

Details Method and circuit for protection of sensitive data in scan... Method and circuit for protection of sensitive data in scan...

2011-07-26

2011-07-26

Portka, Gary J (Department: 2187)

Electrical computers and digital processing systems: memory

Storage accessing and control

Control technique

C365S201000, C714S718000, C726S027000

Reexamination Certificate

active

07987331

ABSTRACT:
A reset generator for resetting at least one register in a register bank. The register generator comprises a scan mode input terminal configured to input a scan mode signal, a system reset input terminal configured to input a system reset signal, a secure reset output terminal configured to output a secure reset signal and a combination logic unit configured to combine the scan mode signal and the system reset signal. The combination is such that when the scan mode of the at least one register is activated, the secure reset signal is immediately activated for resetting the at least one register. The activation of the secure reset signal is independent of the system reset signal. The secure reset signal is deactivated when the system reset signal is deactivated and the secure reset signal follows the activation/deactivation cycles of the system reset signal after deactivation.

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