Method and circuit for logic input buffer

Details Method and circuit for logic input buffer Method and circuit for logic input buffer

1998-05-01

2000-11-14

Tokar, Michael

Electronic digital logic circuitry

Interface

Current driving

326 87, 326 86, H03K 190175

Patent

active

061475130

ABSTRACT:
A novel logic input buffer having independent DC input trip points (e.g., V.sub.IL and V.sub.IH), reduced cross current during signal transitions, shorter propagation delay, and improved noise performance. The input buffer includes a set of input transistors having dynamically adjustable beta(s) that allows for robust control of the transistor(s) operating characteristics. The beta(s) can be adjusted by changing the size(s) of the input transistors through enabling and disabling selected one(s) of additional input transistor(s).

REFERENCES:
patent: 5495187 (1996-02-01), Martin
patent: 5732027 (1998-03-01), Arcoleo et al.
patent: 5801548 (1998-09-01), Lee et al.

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