Method and circuit for glitch-free changing of clocks having...

Details Method and circuit for glitch-free changing of clocks having... Method and circuit for glitch-free changing of clocks having...

2006-04-04

2006-04-04

Chin, Stephen (Department: 2634)

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

C375S357000, C327S141000

Reexamination Certificate

active

07023944

ABSTRACT:
A circuit for glitch-free changing of clocks having different phases. The circuit comprises a phase detector for receiving a data stream and a system clock, and generating a phase-up signal and a phase-down signal; a flag signal generator for receiving the phase-up signal and the phase-down signal, and then generating M flag signals, wherein the select signal corresponding to the enabled flag signal is enabled; an output stage for receiving the M select signals and the M clocks, and then outputting the system clock.

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