Method and circuit for efficiently replacing invalid locked port

Details Method and circuit for efficiently replacing invalid locked port Method and circuit for efficiently replacing invalid locked port

1996-03-04

1998-10-13

Swann, Tod R.

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

711144, 711163, G06F 1214

Patent

active

058227644

ABSTRACT:
A cache locking mechanism is implemented so that portions of the cache may be locked to protect critical instructions or data residing within the cache. Such a cache may be associated with a processor chip, coupled to a data processing system. The cache locking mechanism forces de-allocation of cache entries to the unlocked section of the cache. However, allocation of cache entries is performed regardless of whether or not an entry resides within the locked portion, provided that there exists invalid entries within the locked portion.

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