Method and circuit for determining sense amplifier sensitivity

Details Method and circuit for determining sense amplifier sensitivity Method and circuit for determining sense amplifier sensitivity

2006-05-30

2006-05-30

Nguyen, Viet Q. (Department: 2827)

Static information storage and retrieval

Read/write circuit

Differential sensing

C365S210130, C365S189090, C365S196000, C365S205000, C365S201000

Reexamination Certificate

active

07054213

ABSTRACT:
A dynamic random access memory (DRAM) includes a bit line pair, including a first bit line and a second bit line. Memory cells and a sense amplifier are coupled to the bit lines. A first characterization cell is coupled between the first bit line and a first reference supply line. The first characterization cell includes a capacitor. Similarly, a second characterization cell is coupled between the first bit line and the first reference supply line. The second characterization cell also includes a capacitor but preferably with a different capacitance. In the preferred embodiment, similar characterization cells are coupled to the second bit line.

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