Method and circuit for determining sense amplifier sensitivity

Static information storage and retrieval – Read/write circuit – Testing

Reexamination Certificate

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Details

C365S205000, C365S207000, C365S190000, C365S202000, C365S196000

Reexamination Certificate

active

06862233

ABSTRACT:
A dynamic random access memory (DRAM) includes a bit line pair, including a first bit line and a second bit line. Memory cells and a sense amplifier are coupled to the bit lines. A first characterization cell is coupled between the first bit line and a first reference supply line. The first characterization cell includes a capacitor. Similarly, a second characterization cell is coupled between the first bit line and the first reference supply line. The second characterization cell also includes a capacitor but preferably with a different capacitance. In the preferred embodiment, similar characterization cells are coupled to the second bit line.

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