Method and arrangement for the verification of NV fuses as...

Details Method and arrangement for the verification of NV fuses as... Method and arrangement for the verification of NV fuses as...

2007-02-13

2007-02-13

Smithers, Matthew (Department: 2137)

Electrical computers and digital processing systems: support

Data processing protection using cryptography

By stored data protection

C711S164000

Reexamination Certificate

active

10320268

ABSTRACT:
The invention relates to a method and an arrangement for the verification of NV fuses as well as to a corresponding computer program product and to a corresponding computer-readable storage medium which can be used notably for the detection of attacks on the smart card security which modify EEPROM contents and hence also the contents of EEPROM fuses.During the reset phase the fuses are read from the EEPROM. The fuse values successively read out are then automatically verified. One possible implementation is, for example, to load the fuse values read out into a signature register, followed by comparison with a reference value. Appropriate security measures can be activated should the automatic verification indicate an error, for example, due to unauthorized modification of a fuse or attack on the boot operation.

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patent: 0287338 (1988-04-01), None
patent: WO0019224 (2000-04-01), None

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