Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
1999-05-25
2002-04-16
Chung, Phung M. (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
Reexamination Certificate
active
06374385
ABSTRACT:
FIELD OF THE INVENTION
The invention relates to a method and an arrangement for decoding in a receiver by a feedback neural network a signal that is convolutionally encoded in a transmitter.
BACKGROUND OF THE INVENTION
In telecommunications the signal path used for transmissions is known to cause interference of the communication. This occurs regardless of the physical form of the transmission path, i.e. whether the path is a radio link, an optical fiber or a copper cable.
In order to diminish the effects of interference caused by the transmission path, a digital signal is encoded so as to make the transmission connection more reliable. In that case interference-induced errors in the transmitted signal can be detected and, depending on the encoding method used, even corrected without retransmission. Conventional coding methods used in digital telecommunication include, for example, block coding and convolutional coding. In block coding the bits to be encoded are grouped into blocks and parity bits are added at the end of the blocks so that the correctness of the bits of the preceding block can be checked by means of the parity bits.
A typical coding method used in cellular radio applications is convolutional coding which is well suitable for a fading channel. In convolutional coding, the parity bits are placed among the data bits in such a way that the encoding is continuous. The data bits are not grouped into blocks nor are the parity bits connected to immediately preceding data bits, but they are distributed over the area of a bit group of a certain length, the number of bits being called the constraint length of a convolutional code.
Convolutional coding can be realized by a shift register. This is illustrated in FIG.
1
. Generally described, the shift register consists of L k-bit stages
100
to
104
and n linear function generators
106
to
112
. It is assumed here that the data to be encoded is binary. Data
114
is shifted into a shift register 116 k-bits at a time. The number of output 118 bits for each k-bit input sequence is n bits. The code rate is defined as R
c
=k
. The parameter L is called the constraint length of the convolutional code.
The efficiency of convolutional coding depends on the code rate and constraint length used. A large constraint length enables good error correcting capability, but, on the other hand, decoding is then extremely complicated by known methods.
Convolutional coding is typically decoded by using a Viterbi algorithm having nearly an optimal performance. It is a drawback of the Viterbi algorithm that its complexity increases exponentially as the constraint length increases. This has set limits to the constraint lengths available for use.
Another known decoding method is sequential decoding disclosed in more detail in publication by J. G. Proakis, Digital Communications, 3
rd
edition, pp. 500-503. One of the drawbacks of this algorithm is that the decoding delay does not stay constant but varies.
Yet another known decoding method is what is known as a stack algorithm, disclosed in more detail in the above publication by J. G. Proakis, Digital Communications, 3
rd
edition, pp. 503-506. The performance of this algorithm is not as good as that of the Viterbi algorithm.
U.S. Pat. No. 5,548,684 discloses a method applying neural networks in the decoding of a convolutional code. The method according to the publication implements the Viterbi algorithm by a neural network. However, the performance of the solution is not adequate enough for practical applications.
The known Viterbi algorithm method has the best performance for decoding convolutional coding, but its practical implementation turns out extremely complicated as the constraint length increases. A difficult hardware implementation of the complicated Viterbi algorithm has set limits to the constraint lengths available for use.
BRIEF DESCRIPTION OF THE INVENTION
An object of the invention is thus to provide a method and an arrangement implementing the method so as to solve the above problems. This is achieved by a method of the invention for decoding a convolutionally encoded signal which comprises code words and in which method decoding is carried out by an artificial neural network which comprises a set of neurons comprising a set of inputs and an output, and that the received set of code words is conducted to the inputs of the neuron by a shift register, and in which neuron, some of the inputs of the neuron are combined.
The method of the invention is characterized in that some of the output signals of the neural network neurons are fed back to the inputs of each neuron and at least some of the inputs of the neuron are multiplied with one another before they are combined and that initial values are set for the neurons and the network is allowed to settle into a state of equilibrium, an estimate of the decoded symbol is directed from the output signal of a predetermined neuron to the output of the network after the network has reached the state of equilibrium, the set of code words residing in the shift register are updated, and the above four steps are repeated until the desired number of code words have been decoded.
The invention also relates to an arrangement for decoding a convolutionally encoded signal which comprises code words and which arrangement comprises a neural network which comprises a set of neurons comprising a set of inputs and an output, and the received code words are applied to the inputs of the neurons, and which arrangement comprises means for combining some of the inputs of the neuron in the neuron.
The arrangement of the invention is characterized in that some of the output signals of the neural network neurons are fed back to the inputs of the neuron and that the neuron comprises means for multiplying at least some of the inputs of the neuron with one another before the combining means and that the output signal of a predetermined neuron comprises an estimate of a decoded symbol.
The preferred embodiments of the invention are disclosed in the dependent claims.
In the solution of the invention, a convolutional code is decoded by a feedback neural network. The solution of the invention provides many advantages. The solution of the invention provides a performance nearly compatible with the Viterbi algorithm by means of dramatically simpler circuit implementation. In the solution of the invention, equally complicated circuit implementation provides a larger constraint length and thus better error correction than in connection with the Viterbi algorithm.
The neural network of the invention can be easily constructed by semiconductor technology, because apart from the couplings of the inputs, the structure of the neural network neurons is very much alike. Consequently, designing and implementing even a large network does not involve great amount of work. The solution can also be advantageously implemented as a VLSI circuit, and therefore it is fast.
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Al
Hämäläinen Ari
Henriksson Jukka
Chung Phung M.
Nokia Mobile Phones Limited
Torres Joseph D.
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