Method and arrangement for charge carrier profiling in semicondu

Details Method and arrangement for charge carrier profiling in semicondu Method and arrangement for charge carrier profiling in semicondu

1994-04-29

1996-05-14

Nguyen, Vinh P.

Electricity: measuring and testing

Fault detecting in electric circuits and of electric components

Of individual circuit component or element

3241581, G01R 2912

Patent

active

055171281

ABSTRACT:
In the atomic force microscopy method, the scanning system modified to provide high-frequency control is set into oscillation by electrical pulses having an amplitude that is adjustable and variable within a wide range. The pulses are so short that contact between the scanning tip and the sample is avoided. The pulse amplitude and/or form are varied in order to generate space charge zones in the semiconductor structures that are shaped differently within wide limits.

REFERENCES:
patent: 4532422 (1985-07-01), Nomura et al.
patent: 4941753 (1990-07-01), Wickramasinghe
patent: 5055679 (1991-10-01), Ninomiya et al.
patent: 5065103 (1991-11-01), Slinkman et al.
patent: 5237859 (1993-08-01), Elings et al.
patent: 5245863 (1993-09-01), Kajmura et al.
patent: 5255259 (1993-10-01), Hatanaka et al.
patent: 5267471 (1993-12-01), Abraham et al.
patent: 5299184 (1994-03-01), Yamano et al.

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