Method and architecture for integrated circuit design and...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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C716S030000, C716S030000, C716S030000, C716S030000, C716S030000

Reexamination Certificate

active

07032191

ABSTRACT:
A system for integrated circuit (IC) design. A structural multi-project wafer (SMPW) comprises a plurality of pre-manufactured and pre-validated functional blocks. The SMPW is pre-fabricated up to a contact layer so that a user can customize and program different blocks of the SMPW to the user's requirements. An SMPW provider maintains an inventory of SMPWs. If one of the SMPWs can meet all of a user's IC design requirements, or can serve an intermediate step in a user's IC design process, such as market/concept validation or IP validation, the SMPW is provided to the user. The user can then proceed directly to production using a streamlined design flow having a very short cycle time of 1–3 months. Otherwise, the user proceeds to production using a normal design flow having a much longer cycle time.

REFERENCES:
patent: 6504398 (2003-01-01), Lien et al.
patent: 6617621 (2003-09-01), Gheewala et al.
patent: 6873185 (2005-03-01), Cox
patent: 2002/0069396 (2002-06-01), Bhattacharya et al.
patent: 2003/0188282 (2003-10-01), Yang et al.
patent: 2003/0233628 (2003-12-01), Rana et al.
patent: 2004/0224443 (2004-11-01), Wang et al.

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