Method and architecture capable of adaptively accessing data...

Details Method and architecture capable of adaptively accessing data... Method and architecture capable of adaptively accessing data...

2005-02-22

2005-02-22

Huynh, Kim (Department: 2182)

Electrical computers and digital data processing systems: input/

Input/output data processing

Data transfer specifying

C710S008000, C710S009000, C710S010000, C710S033000, C710S034000

Reexamination Certificate

active

06859849

ABSTRACT:
A method and an architecture capable of adaptively accessing data and instructions are provided, in which a plurality of data transfer levels are predefined and a current data transfer level is used for accessing data and instructions of a memory. Each data transfer level corresponds to a length of a continuous data transfer via an interface between the memory and a cache device. Thus, the invention can dynamically adjust the current data transfer level based on burst lengths actually occurred as a processor kernel accesses data/instructions.

REFERENCES:
patent: 6185637 (2001-02-01), Strongin et al.
patent: 6473814 (2002-10-01), Lyons et al.

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