Computer graphics processing and selective visual display system – Computer graphics display memory system – Addressing
Reexamination Certificate
1999-12-02
2003-02-25
Tung, Kee M. (Department: 2671)
Computer graphics processing and selective visual display system
Computer graphics display memory system
Addressing
C345S543000, C711S206000, C711S202000
Reexamination Certificate
active
06525739
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to the use of memory in a computer and, more particularly, to the use of computer memory for graphics.
BACKGROUND OF THE INVENTION
Chipsets featuring an Accelerated Graphics Port (AGP) provide enhanced graphics performance using a Graphics Address Re-Mapping Table (GART). The GART is a page table supported by the chipset for use by the graphics cards. The GART maps a contiguous block of memory addresses to the actual memory blocks allocated for the Graphics Aperture (GA). In reality the GA is made up of a number of disjoint pages scattered all over system memory. The GART re-maps these disjoint pages to a contiguous graphics aperture. For example,
FIG. 1
shows a how a GART
110
could work in a memory map
105
. Assume in
FIG. 1
that the memory map
105
includes a Random Access Memory (RAM) space four gigabytes (GB) in size but only 2 GB of RAM is actually installed. The memory addresses between 3 GB and 4 GB in memory map
105
are reserved for a GA
112
. The GART
110
then maps these addresses to blocks of physical memory. For example, addresses
115
A,
120
A,
125
A, and
130
A in GART
110
are mapped to pages
115
B,
120
B,
125
B, and
130
B, respectively, in the physical RAM
105
. These pages
115
B,
120
B,
125
B, and
130
B constitute pages of the GA.
GART implementation varies with chipsets. In one prior art implementation, a device driver called AGP GART driver allows a target operating system to expose the AGP features for graphics applications.
One of the major functions performed by the GART driver is to fill up the GART table with page addresses. Each GART table entry corresponds to a page in the physical memory. Today, most chipsets support not more than 2 GB of RAM. This will change in future chipsets.
Usually the Basic Input Output System (BIOS) or the GART driver sets the base address for the GA. The GA range (GA base address plus the length of the GA) is then marked as reserved. Currently, the GA is mapped to a memory range where no RAM is present (say in the range 3 GB-4 GB). For instance, a system that has 2 GB of RAM can map its GA anywhere in the range 2 GB to 4 GB. Thus the GA range does not overlap with the memory range where RAM is present. The GART driver then allocates a page of memory for each GART entry and fills the needed fields appropriately. This works well now because currently no physical memory exists in the GA range and thus only memory addresses (and not memory) are wasted.
The GA size is growing as chipset designs advance. For instance, GAs are reaching sizes as large as 32 GB. In future systems the chances are consequently greater that the GA range will overlap a memory range where RAM is present. Because the BIOS or the operating system marks the GA range as reserved, the GA range cannot be used for other purposes. If RAM lies in the GA range, the overlapping RAM will be unavailable.
SUMMARY
The present invention comprises a software program for reusing the physical memory that overlaps the graphics aperture. The program determines whether the graphics address re-mapping table is accessible by a device. The graphics address re-mapping table is then filled to re-map the graphics aperture according to whether the graphics address re-mapping table is accessible by the device.
REFERENCES:
patent: 5933158 (1999-08-01), Santos et al.
patent: 6069638 (2000-05-01), Porterfield
patent: 6211891 (2001-04-01), Wahlig
patent: 6358204 (2002-03-01), Finger et al.
Gurumoorthy Nagasubramanian
Sadashivaiah Shivaprasad
Intel Corporation
Marger & Johnson & McCollom, P.C.
Tung Kee M.
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