Method and apparatus to minimize power and ground bounce in...

Electrical computers and digital processing systems: support – Computer power control – Power conservation

Reexamination Certificate

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C713S300000, C713S330000, C323S204000

Reexamination Certificate

active

11008341

ABSTRACT:
A predictive power regulation apparatus and method that minimizes power and ground bounce in a logic device. The apparatus includes a predictor and a voltage or current smoothing device connected to the predictor. The voltage or current smoothing device outputs adjusted voltage or current to power and ground planes of the logic device. In one embodiment, the predictor includes an instruction scanner device and a look-up table connected to the instruction scanner device. The instruction scanner device determines the next instruction to be executed by the logic device. A voltage/current scheduling buffer connected to the look-up table contains voltage and current compensation and the time at which the voltage or current compensation should be requested from the voltage or current smoothing device. An alternative predictive power regulation apparatus is described that reduces power and ground bounce caused by the I/O buffer circuitry switching in the logic device.

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