Method and apparatus to match semiconductor device performance

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C257S347000, C257S379000, C438S149000, C438S479000, C438S517000

Reexamination Certificate

active

06329690

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to a method and apparatus that maintains devices at the same temperature on a silicon on insulator (SOI) substrate.
2. Description of the Related Art
Conventional systems utilize identical devices (transistors and diodes) in different circuits at different locations on a chip. These devices dissipate different amounts of heat depending upon the duty cycle of the circuit and surrounding circuits and devices. Further, these devices operate at different temperatures. Thus, each device, even if designed identically, may have different current/voltage (IV) characteristics so the circuits will not behave identically, which can result in design flaws.
The temperature effects of NMOS and PMOS devices are well known. For example, the mobility of the carriers is inversely proportional to the temperature. The mobility may decrease (and resistivity may increase) by about 40% for each 100° C. temperature rise. Further, both drain current and threshold voltage decrease with mobility. Accordingly, devices at different temperatures can have very different characteristics.
To minimize these problems, devices that need to be matched are placed in close proximity to each other. However, this is not always possible and therefore cooling may be applied to the chip using external heat sinking. Even this is not completely effective, especially in low voltage regimes. Devices fabricated in silicon on insulator (SOI) technology presents an additional problem because they are thermally isolated by the insulator which makes bulk cooling not as effective.
SUMMARY OF THE INVENTION
In view of the foregoing and other problems of the conventional methods, it is, therefore, an object of the present invention to provide a semiconductor structure that may include a silicon substrate, a first active device formed in a first region of the silicon substrate and a second active device formed in a second region of the silicon substrate. A first heating device (such as a resistor) may be connected thermally to the first active device and a second heating device (such as a resistor) may be connected thermally to the second active device. A first temperature sensing device (such as a diode) may detect a temperature of the first region and a second temperature sensing device (such as a diode) may detect a temperature of the second region. A circuit may activate the first heating device or the second heating device in response to a sensed difference in temperature from the first and second temperature sensing devices. Current may be supplied to the heating devices to activate them.
The structure may also include a first amplifier and a second amplifier. The first amplifier may be connected between the first temperature sensing device and the first heating device. The second amplifier may be connected between the second temperature sensing device and the second heating device. The first heating device may include a first polysilicon resistor formed on the first active device, while the second heating device may comprise a second polysilicon resistor formed on the second active device.
A first load device may also be provided in the first region of the silicon substrate and a second load device may be provided in the second region of the silicon substrate.
The present invention provides a methodology, circuit and structure to keep devices in different locations on the chip at the same temperature by providing a method and apparatus of monitoring the temperature of each device, and maintaining each device at the same temperature by turning a heating device on or off.
Other objects, advantages and salient features of the invention will become apparent from the following detailed description taken in conjunction with the annexed drawings, which disclose preferred embodiments of the invention.


REFERENCES:
patent: 4896199 (1990-01-01), Tsuzuki et al.
patent: 5049961 (1991-09-01), Zommer et al.
patent: 5343064 (1994-08-01), Spangler et al.
patent: 5345213 (1994-09-01), Semancik et al.
patent: 5464966 (1995-11-01), Gaitan et al.
patent: 5817543 (1998-10-01), McAllister et al.
patent: 5869354 (1999-02-01), Leedy
Briand et al., “Novel Low-Power Consumption MOSFET Array Gas Sensor,” 10th International Conference on Solid-State Sensors and Actuators, Transducers '99, Digest of Technical Papers,Jun. 7-10, 1999,Inst. of Elec. Engineers of Japan,vol. 2, pp. 938-941.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method and apparatus to match semiconductor device performance does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method and apparatus to match semiconductor device performance, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus to match semiconductor device performance will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2564729

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.