Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
Reexamination Certificate
2003-05-27
2008-07-22
Peikari, B. James (Department: 2189)
Electrical computers and digital processing systems: memory
Storage accessing and control
Shared memory area
C711S146000, C711S141000, C711S005000
Reexamination Certificate
active
07404047
ABSTRACT:
Methods and apparatuses for improving processor performance in a multi-processor system by optimizing accesses to memory. Processors can track the state of a memory such that the memory can be efficiently utilized in a multi-processor system including the ability to decode incoming snoop addresses from other processors, comparing them to contents of a memory tracking register(s), and updating tracking register(s) appropriately. Likewise, the transactions from other non-processor bus agents and/or bus mastering devices, such as a bus bridge, memory controller, Input/output (I/O), and graphics could also be tracked.
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Examination Report from GB Application No. GB0521374.9, mailed Feb. 22, 2006, 11 pgs.
PCT Search Report Dec. 13, 2004.
Dodd James M.
Milstrey Robert
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