Method and apparatus to execute an instruction with a...

Electrical computers and digital processing systems: processing – Processing control – Arithmetic operation instruction processing

Reexamination Certificate

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C712S223000

Reexamination Certificate

active

07047397

ABSTRACT:
A method for executing an instruction with a semi-fast operation in a staggered ALU. The method of one embodiment comprises generating a first operation and a second operation from a micro-instruction. The first and second operations are scheduled for execution in a staggered arithmetic logic unit (ALU). The first and second operations are separated by N clock cycles. Data from the first operation is communicated to the second operation for use with execution of the second operation.

REFERENCES:
patent: 4639886 (1987-01-01), Hashimoto et al.
patent: 5509130 (1996-04-01), Trauben et al.
patent: 5564014 (1996-10-01), Yamashita et al.
patent: 5808623 (1998-09-01), Hamburg
patent: 5956511 (1999-09-01), Tahara
patent: 6658578 (2003-12-01), Laurenti et al.

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