Method and apparatus supporting non-additive calculations in...

Details Method and apparatus supporting non-additive calculations in... Method and apparatus supporting non-additive calculations in...

2005-01-13

2009-11-10

Mai, Tan V (Department: 2193)

Electrical computers: arithmetic processing and calculating

Electrical digital calculating computer

Particular function performed

C708S606000, C708S505000

Reexamination Certificate

active

07617268

ABSTRACT:
A method and apparatus receiving number and using instruction to create resulting number approximating one of square root, reciprocal, or reciprocal square root of number. The resulting number as a product of that process. Using resulting number in a graphics accelerator. Apparatus preferably includes log-calculator, log-arithmetic-unit, and exponential-calculator. At least one of log-calculator and exponential-calculator include implementation non-linear calculator. The non-linear calculators may use at least one of mid-band-filter, outlier-removal-circuit. The invention includes making arithmetic circuit, log-calculator, log-arithmetic-unit and exponential-calculator. The arithmetic circuit, log-calculator, log-arithmetic-unit and exponential-calculator as products of manufacture. The arithmetic circuit may further include at least one of a floating-point-to-log-converter and/or a second of log-calculators. The arithmetic circuit may further include third and fourth log-arithmetic-units providing altered log domain numbers to third and fourth exponential calculators.

REFERENCES:
patent: 6480873 (2002-11-01), Inoue et al.
patent: 6678710 (2004-01-01), Shankar et al.
patent: 6976043 (2005-12-01), Clifton

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