Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
Patent
1997-12-09
2000-10-17
Yoo, Do Hyun
Electrical computers and digital processing systems: memory
Storage accessing and control
Shared memory area
711168, G06F 1314, G06F 1200
Patent
active
061346357
ABSTRACT:
A method used by a first memory controller to prevent deadlock of requests to a memory having a first memory line is disclosed. The method includes the steps of (1) receiving a first memory request for the first memory line from a first bus, (2) receiving a second memory request for the first memory line from a second bus, (3) propagating the first memory request through to the second bus after the second memory request receiving step, (4) processing the second memory request by storing a first modified copy of the first memory line in the first memory controller, and (5) processing the first memory request by (a) storing a second modified copy of the first memory line in the first memory controller, and (b) transferring the second modified copy of the first memory line to a caching agent in order to satisfy the first memory request.
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Intel Corporation
Williams, II Jan S.
Yoo Do Hyun
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