Method and apparatus of programming FPGA devices through ASIC de

Details Method and apparatus of programming FPGA devices through ASIC de Method and apparatus of programming FPGA devices through ASIC de

1996-10-24

1999-02-02

Santamauro, Jon

Electronic digital logic circuitry

Multifunctional or programmable

Having details of setting or programming of interconnections...

326 39, 364489, H03K 19173

Patent

active

058670378

ABSTRACT:
A method and apparatus for receiving and transmitting programming data through an application specific integrated circuit is provided. In a first embodiment, the application specific integrated circuit comprises a main circuit, at least two input/output (I/O) mechanisms connected to the main circuit for transferring data into and out of the main circuit and a mechanism for receiving and transmitting the programming data. The mechanism for transmitting the programming data includes a tri-state buffer that is activated by a programming enable signal. In a second embodiment, the input and output of the buffer are multiplexed with the two I/O mechanisms connected to the main circuit.

REFERENCES:
patent: 4870302 (1989-09-01), Freeman
patent: 5051622 (1991-09-01), Pleva
patent: 5122685 (1992-06-01), Chan et al.
patent: 5339262 (1994-08-01), Rostok eret al.
patent: 5412260 (1995-05-01), Tsui et al.
patent: 5432708 (1995-07-01), Mohsen
patent: 5475583 (1995-12-01), Bock et al.
patent: 5497498 (1996-03-01), Taylor
patent: 5534793 (1996-07-01), Nasserbakht
patent: 5696454 (1997-12-01), Trimberger
patent: 5745734 (1998-04-01), Craft et al.

Affiliated with

Also associated with

Rating

Method and apparatus of programming FPGA devices through ASIC de does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method and apparatus of programming FPGA devices through ASIC de, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus of programming FPGA devices through ASIC de will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1120751