Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture
Reexamination Certificate
2000-04-11
2003-07-08
Lefkowitz, Sumati (Department: 2189)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus interface architecture
Reexamination Certificate
active
06591325
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an information processing system comprising a plurality of system modules, and more particularly to a method and apparatus for transferring transactions among the system modules. In particular, the present invention relates to a transaction transferring method and apparatus using a split transaction mode.
2. Description of the Related Art
Many information processing devices, such as computers or communication devices, use a transaction transferring mode in which a requesting system module reads data from, or writes data into, a responding system module. Such a transaction transferring mode uses, in most cases, a split transaction mode. In this mode, the requesting system module sends a request transaction (contents of request processing) to the responding system module, and the responding system module returns a response transaction (requested data, transaction processing result, and so on) to the requesting transaction module.
In the split transaction mode, the requesting system module frees the transfer route immediately after it issues a request transaction. When the responding system module becomes ready for returning a response transaction, it acquires a transfer route and issues a response transaction. In this mode, an issued requesting transaction does not wait for a response with the transfer route reserved and, therefore, the responding system module can process a plurality of request transactions concurrently. In some cases, a requesting transaction and a responding transaction use different transfer routes.
However, if the responding system module must return request transactions in the order in which they were issued, a time-consuming request transaction would keep all subsequent transactions waiting long.
A prior art that solves this problem is disclosed, for example, in Japanese Patent Laid-Open Publication No. Hei 6-149730. The method disclosed in Japanese Patent Laid-Open Publication No. Hei 6-149730 is that a special signal for transferring transaction IDs is provided on the transfer route from the requesting system module to the responding system module and on the transfer route from the responding system module to the requesting system module. Using this signal, the requesting system module adds an ID, prepared by the requesting system module, to a request transaction. The responding system module receives this request transaction and returns the response transaction with this ID added. Because the requesting system module uses an ID, added to the response transaction, to associate the response transaction with the corresponding response transaction, the responding system module may return response transactions in any order. Therefore, even if a time-consuming request transaction is in the wait state, the responding system module may return responses to the request transactions that follow the time-consuming request transaction.
The method according to the prior art requires IDs to be transferred between the requesting system module and the responding system module. One way to implement this method is to provide a special signal line for transferring IDs. However, an additional special signal line increases the number of signal lines of the transaction transfer route. Another way is to transfer IDs over an another existing signal line. However, this method lengthens a transaction that passes through the transfer route and therefore decreases transfer performance. In particular, in an information processing system where a plurality of requesting system modules are connected to a responding system module or where a requesting system module is connected to a plurality of responding system modules, a plurality of special ID-transferring signal lines must be connected to the requesting system module in the former case and to the requesting system module in the latter case.
For example, in a system where eight nodes, each composed of a processor, a memory, and I/O devices, are connected via a cross bus switch, request transactions and response transactions are transferred bi-directionally between each of the nodes and the cross bus switch. So, if the transaction ID is 8 bits long, as many as 128 (8 bits×8 nodes×2 [request and response]) special ID-transferring lines are required for the cross bus switch.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a method and apparatus that allow a responding system module to issue response transactions in an order different from the request transaction reception order without transferring transaction IDs between the requesting system module and the responding system module.
The information processing system according to the present invention uses the split transaction mode. That is, the request side system module issues a request transaction to the response side system module. In response to this request transaction, the response side system module issues a response transaction to the request side system module. Response transactions returned from the response side system module to the request side system module include transactions that control the transaction order.
More specifically, the request side system module and the response side system module each memorize the order in which request transactions were issued. The request side system module has a request side pointer pointing to the request transaction to which a response is to be returned next. The response system module has a response side pointer pointing to the request transaction corresponding to the response transaction to be issued next. When the response system module is to issue a response transaction corresponding to the request transaction different from that pointed to by the request side pointer, the response side system module issues a transaction that changes the value of the request side pointer. In response to this transaction, the request side system module changes the value of the request side pointer. After issuing the transaction, the request side system module changes the value of the response side pointer. As a result of the change, the request side pointer and the response side pointer point to the same request transaction.
Typically, two transactions are provided. One is a transaction for changing the value of the request side pointer; this transaction increments the value of the request side pointer by one. The other is a transaction that resets the request side pointer to the beginning of the request side pointer. These two transactions are used in combination. It is possible to increment the pointer value by N instead of 1. It is also possible to use a transaction that causes the pointer to point to any desired position.
REFERENCES:
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patent: 6101568 (2000-08-01), Richardson
patent: 6173369 (2001-01-01), Nguyen et al.
patent: 6195722 (2001-02-01), Ram et al.
patent: 6202101 (2001-03-01), Chin et al.
patent: 6205506 (2001-03-01), Richardson
patent: 6356972 (2002-03-01), Chin et al.
patent: A-6-149730 (1994-05-01), None
Akashi Hideya
Hamanaka Naoki
Kashiyama Masamori
Okada Tetsuhiko
Shonai Toru
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