Electrical computers and digital processing systems: memory – Address formation
Reexamination Certificate
2007-04-03
2007-04-03
Bataille, Pierre (Department: 2186)
Electrical computers and digital processing systems: memory
Address formation
C711S151000, C711S156000, C711S168000, C711S169000, C718S103000
Reexamination Certificate
active
10763432
ABSTRACT:
A scrambling operation is used to space apart the grants that a communication circuit receives during a period of time, such as 512 arbitration periods. An operator can enter the number of arbitration periods that a communication circuit is to receive in blocks of sequential logical address ranges. The logical addresses are then changed to physical addresses that are spaced apart, thereby significantly reducing the buffering required by the communication circuit.
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Chung Keith Quoc
Geerdes Gary J.
Leroy Christophe Pierre
Ripy Paul Brian
Bataille Pierre
Patel Hetul
Pickering Mark C.
Tellabs Petaluma, Inc.
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