Method and apparatus in a data processing system for...

Computer graphics processing and selective visual display system – Computer graphics display memory system – Frame buffer

Reexamination Certificate

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Details

C345S626000, C345S629000

Reexamination Certificate

active

06710777

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Technical Field
The present invention relates generally to an improved data processing system and in particular to a method and apparatus for displaying pixels in a data processing system. Still more particularly, the present invention provides a method and apparatus for installing the correct wid values for a transparent region.
2. Description of Related Art
Computer graphics concerns the synthesis or display of real or imaginary objects from computer-based models. In computer graphics systems, images are displayed on a display device to a user in two dimensional and three dimensional forms. These images are displayed using pixels. A pixel is short for a picture element. One spot in a rectilinear grid of thousands of such spots that are individually “painted” to form an image produced on the screen by a computer or on paper by a printer. A pixel is the smallest element that display or print hardware and software can manipulate in creating letters, numbers, or graphics. These pixels and information relating to these pixels are stored in a buffer. The information describing a pixel is identified using a window ID (WID). A WID is used as an index into a window attribute table (WAT). The WAT contains information describing how a pixel will be displayed on the screen. For example, a WAT identifies depth, color map, buffer, and gamma for a pixel.
Typically, the WID is drawn into a separate buffer, which is used to describe how the pixels in the frame buffer or buffers will be rastered. Some graphic systems, such as, for example, UNIX servers, use overlays to enhance the performance of three dimensional applications, which need to be overlaid on top of a three dimensional application. An example of such is a menu. These type of servers typically require a separate WID buffer for the color planes and overlays to allow for the WIDs to be saved and restored. In
FIG. 1
, an example of data in a portion of a WID color buffer is illustrated.
FIG. 2
is an example of data in a portion of a WID overlay buffer. In these two examples, each of the numbers illustrates a WID, which is used as an index into a WAT to identify information used to display a pixel associated with the WID. In
FIG. 2
, a zero is used to indicate that the overlay is disabled.
Typically, an eight bit split WID may be identified in hardware in which three bits are used to identify the WID for the overlay buffer and in which five bits are used to identify the WID for the color buffer. For example, the first three bits are used as an index into an overlay WAT while the lower five bits are used as an index into a color WAT. With three bits, eight WID entries may be identified or assigned to a pixel using the WID overlay buffer. Thirty-two different WID entries may be assigned to pixels using the WID color buffer. In this manner, a WID for a color buffer may be painted to the frame buffer without overwriting the WID in the overlay buffer.
FIG. 3
illustrates resulting WIDs that would be used to display pixels displayed on a screen. Each of the WIDs identifies what pixels and from what buffer the pixels will be retrieved for display.
In manufacturing graphics chips, it is cheaper to fabricate a graphics chip without split WIDs. In such a case, only one WID buffer and two frame buffers are required. Some color graphic adapters support multiple color maps. For example, if a graphics adapter supports four color maps, a total of four color maps may be displayed on the screen at any one time. Without split WIDs, the number of bits available are reduced. For example, a non-split WID graphics chip may support only four WID bits. It is desirable to maximize the total number of WIDs using these four WID bits. In such a case, no WID is associated for transparency. This setup allows a window with a transparent visual to be displayed without using a WID. In
FIG. 4
, a WAT table is illustrated for a color WAT and an overlay WAT. Table
400
is an example of a WAT for a four bit WID system. WIDs
0
-
4
are used for opaque overlay WIDs, while WIDs
5
-
15
are used for color plane WIDs and for transparency for the transparent visual. In this example, each WID also includes an identification of a color map, as well as pixel type, buffer location of the pixel, and gamma. In
FIG. 5
, a portion of a four bit WID buffer is illustrated. Transparent region
500
includes WIDs
1
,
2
, and
5
. Using WAT
400
in
FIG. 4
, WID
5
contains the correct color map slot of
4
for the transparent overlay. WID
1
and WID
2
are opaque overlay WIDs using WID table
400
. For these WIDs, the WID values are incorrect and will produce incorrect color map slots of
2
and
3
for these portions of the transparent window. The WID values are correct for part of transparent region
500
and incorrect for other parts of transparent region
500
in FIG.
5
. As can be seen, the problem associated with such an architecture creates problems in using the correct WID values which will in essence contain the correct color map and be transparent.
Therefore, it would be advantageous to have an improved method and apparatus for installing a correct WID values over an entire transparent region.
SUMMARY OF THE INVENTION
The present invention provides a method and apparatus in a data processing system for updating a buffer containing display information used to display pixels from a first layer and a second layer on a display in the data processing system. A transparent region containing pixels from the first layer and pixels from the second layer is identified. The display information is updated in the buffer for pixels in the first layer in the transparent region. Correct display information is assigned to pixels in the second layer in the transparent region.


REFERENCES:
patent: 5046042 (1991-09-01), Nitatori et al.
patent: 5604518 (1997-02-01), Flaker et al.
patent: 5629723 (1997-05-01), West et al.
patent: 5801705 (1998-09-01), Kato et al.
patent: 5831638 (1998-11-01), West et al.
patent: 5854628 (1998-12-01), Nakagawa
patent: 5874967 (1999-02-01), West et al.

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