Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Reexamination Certificate
2002-11-01
2004-10-19
Padmanabhan, Mano (Department: 2188)
Electrical computers and digital processing systems: memory
Storage accessing and control
Control technique
C711S103000, C711S156000, C365S185030
Reexamination Certificate
active
06807610
ABSTRACT:
TECHNICAL FIELD
The present invention relates to an integrated multilevel nonvolatile memory circuit which has a plurality of memory units arranged in an array comprising a plurality of rows and columns, wherein each of the memory units has a plurality of memory cells with each cell for storing a multibit state and wherein the memory units store encoded user data and overhead data. As a result, in the present invention, the encoded user data and the overhead data are partitioned virtually.
BACKGROUND OF THE INVENTION
Integrated nonvolatile memory array devices such as flash memory array devices are well known in the art. Typically, the memory array is arranged in a plurality of rows and columns. Further, a sector is a row or a plurality of rows. All the cells within a sector can be erased simultaneously. Within a sector, however, a number of the memory cells are reserved for storage of user data and a number of other memory cells are used to store overhead data such as error correction data, header, etc. See, for example, U.S. Pat. No. 5,602,987. Thus, in the prior art, the partitioning in an array of nonvolatile memory cells between a user data portion and an overhead data portion is based upon the physical boundaries of certain memory cells. In addition, an index is required to indicate where the boundaries of the memory cells are for storage of the user data and for the storage of the overhead data.
An integrated nonvolatile memory circuit array, such as a flash memory array for the storage of multilevels within a single cell is also well known in the art.
However, heretofore, none of the prior art teaches the virtual partitioning between user data and overhead data in an integrated multilevel nonvolatile memory array device whereby the virtual partitioning between the user data and the overhead data causes an increase in density of storage. In addition, the virtual partitioning obviates the need for an index detailing the boundaries of the cells to store user data and overhead data.
SUMMARY OF THE INVENTION
An integrated multilevel nonvolatile memory circuit has a plurality of memory units arranged in an array comprising a plurality of rows and columns. Each of the memory units has a plurality of memory cells with each cell for storing a multibit state. Each of the memory units stores encoded user data and overhead data.
The present invention also relates to a method for storing user data and overhead data in a nonvolatile memory circuit which comprises partitioning an array of semiconductive memory cells into a plurality of memory units with each memory unit having a plurality of memory cells. A multibit state is stored in each memory cell of each memory unit where the memory unit stores encoded user data and overhead data.
REFERENCES:
patent: 5602987 (1997-02-01), Harari et al.
patent: 5909449 (1999-06-01), So et al.
Gray Cary Ware & Freidenrich LLP
Namazi Mehdi
Padmanabhan Mano
Silicon Storage Technology, Inc.
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