Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
2008-07-29
2008-07-29
Wilson, Yolanda L (Department: 2113)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
C714S023000, C714S047300, C714S055000
Reexamination Certificate
active
11003134
ABSTRACT:
A method and apparatus utilizes an exception handler to implement LOAD and STORE instructions for moving data between a peripheral device and CPU registers. TLB entries for peripheral devices are flagged invalid during initialization and an exception handler occurs when LOAD or STORE instructions are executed by the CPU. The exception handler programs a data mover to perform the LOAD or STORE instruction so that the CPU will not hang up in the event that the peripheral device does not respond thereby avoiding reset of the SOC by the watchdog timer.If the peripheral device does not respond before an exception handler timer expires an error is indicated by the exception handler.
REFERENCES:
patent: 6011908 (2000-01-01), Wing et al.
patent: 6058447 (2000-05-01), Holst et al.
patent: 6618825 (2003-09-01), Shaw
Broadcom, Migrating CPU Specific Code from the PowerPC to the Broadcom SB-1 Processor, White Paper, May 22, 2002, Broadcom Corp., Irvine, CA; downloaded from the Internet: <http://www.broadcom.com/collateral/wp/SB-1—WP100-R.pdf>.
Cisco Technology Inc.
Krueger Charles E.
Wilson Yolanda L
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