Method and apparatus for using a variable page length in a...

Details Method and apparatus for using a variable page length in a... Method and apparatus for using a variable page length in a...

2007-12-14

2011-11-15

Bataille, Pierre-Michel (Department: 2186)

Electrical computers and digital processing systems: memory

Storage accessing and control

Control technique

C711SE12003

Reexamination Certificate

active

08060705

ABSTRACT:
A controller, a memory device including a memory array, and a method for accessing the memory device. The method includes, during a first access, activating a first page of the memory array corresponding to a first row address and accessing data from the first page with a first column address. The method further includes, during a second access, activating a first sub-page of the memory array corresponding to a second row address and accessing data from the first sub-page with a second column address. The activated first sub-page of the memory array is smaller than the first page of the memory array. The method further includes activating a second sub-page without receiving a separate activate command.

REFERENCES:
patent: 6526533 (2003-02-01), Cowles et al.
patent: 6694422 (2004-02-01), Kim
patent: 2003/0088753 (2003-05-01), Ikeda et al.
patent: 2004/0095835 (2004-05-01), La et al.
patent: 2008/0256319 (2008-10-01), Sutardja

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