Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2002-07-08
2004-08-03
Nguyen, Hiep T. (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S144000, C711S145000, C711S122000
Reexamination Certificate
active
06772294
ABSTRACT:
BACKGROUND
1. Field of the Invention
The present invention relates to the design of computer systems. More specifically, the present invention relates to a method and an apparatus for using a non-committing data cache to facilitate speculative execution of program instructions.
2. Related Art
Modern computer systems use many techniques to increase performance. For example, recent advances in compiler technology presently make it possible to exploit instruction-level parallelism and to reorder code to facilitate faster execution. Although such compiler optimizations can significantly increase computer system performance, additional performance gains through compiler optimizations are proving harder to come by.
Speculative execution is another approach to increasing computer system performance. Speculative execution occurs when a computer encounters a stall condition and continues executing instructions speculatively, instead of waiting for the stall condition to be resolved. Stalls can occur for a variety of reasons. For example, the instruction stream can stall while a branch condition is resolved or because an instruction (such as a multiply) takes a significant amount of time to complete. At some point, the condition for the stall will be resolved. At this point, the system must decide whether to commit the results generated during the speculative execution or to discard the results.
Note that the speculative execution process cannot overwrite data values without first saving the data values, because the data values may have to be restored if the results of the speculative execution subsequently need to be discarded. Hence, systems that support speculative execution must ensure that data values that are modified in registers, cache memory, or main memory must somehow be saved.
Existing techniques for saving data values during speculative execution typically involve providing additional memory for storing temporary results as well as circuitry to coordinate the process of saving and restoring data values. This additional memory and circuitry can greatly complicate computer system design and can increase computer system cost. Moreover, the process of saving and restoring data values can be time-consuming, which can potentially mitigate the performance advantages of speculative execution.
Hence, what is needed is a method and an apparatus that facilitates speculative execution within a computer system without the problems listed above.
SUMMARY
One embodiment of the present invention provides a system that facilitates speculative execution of instructions within a computer system. Upon encountering a stall during execution of an instruction stream, the system synchronizes a cache containing data that is being operated on by the instruction stream. Next, the system configures the cache so that the cache operates as before except that changes to cache lines are not propagated to lower levels of the memory system. The system then speculatively executes a subsequent portion of the instruction stream without waiting for the event that caused the stall to be resolved. In this way, the speculative execution can only change data within the cache, and these changes are not propagated to lower levels of the memory system unless a subsequent commit operation takes place.
In a variation on this embodiment, synchronizing the cache involves storing dirty lines within the cache to a lower-level cache.
In a variation on this embodiment, synchronizing the cache involves storing dirty lines within the cache to a main memory.
In a variation on this embodiment, speculative execution commences after the process of synchronizing the cache completes.
In a variation on this embodiment, speculative execution commences before the process of synchronizing the cache completes.
In a variation on this embodiment, after the event that caused the stall is resolved, the system determines if changes made to data during speculative execution can be committed. If so, the system commits the changes made during speculative execution. Otherwise, the system discards the changes made during speculative execution.
In a further variation, committing the changes involves storing dirty cache lines that have been modified during speculative execution to lower levels of the memory system.
In a variation on this embodiment, discarding the changes involves invalidating dirty cache lines that have been modified during speculative execution.
In a variation on this embodiment, the system additionally saves data from the processor registers prior to commencing speculative execution.
In further variation, the system restores the saved data to processor registers after completing speculative execution.
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Nguyen Hiep T.
Park Vaughan & Fleming LLP
Sun Microsystems Inc.
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