Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2007-06-12
2007-06-12
Lin, Sun James (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000, C716S030000
Reexamination Certificate
active
10952194
ABSTRACT:
A method and apparatus are provided for placing cells in an integrated circuit layout pattern. A base layer layout pattern defines an array of base cell locations and base layer elements, wherein at least portions of some rows in the array are reserved for decoupling capacitor cells. Each decoupling capacitor cell has a width, which is greater than that of a single base cell location and which is abstracted from the base layer layout pattern. A cell library defines a plurality of cells, including a macro cell having open rows consistent with the rows in the base layer layout pattern that are reserved for the decoupling capacitor cells. The width of each decoupling capacitor cell is abstracted from the macro cell. Cells from the cell library, including the macro cell, are placed within a design layout pattern relative to the base layer layout pattern. An area consumed by the macro cell within the design layout pattern is independent of the width of the decoupling capacitor cells.
REFERENCES:
patent: 5668399 (1997-09-01), Cronin et al.
patent: 5726485 (1998-03-01), Grass
patent: 5739576 (1998-04-01), Shirley et al.
patent: 5959320 (1999-09-01), Torgerson et al.
patent: 6310815 (2001-10-01), Yamagata et al.
patent: 6563192 (2003-05-01), Corisis et al.
patent: 7062732 (2006-06-01), Ito et al.
patent: 2004/0228066 (2004-11-01), Sakurabayashi et al.
patent: 2005/0229132 (2005-10-01), Butt et al.
Dillon Michael N.
Tremel Christopher J.
Lin Sun James
LSI Corporation
Westman Champlin & Kelly
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