Method and apparatus for tracking, reporting and correcting...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing

Reexamination Certificate

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Details

C714S704000, C714S711000, C365S200000

Reexamination Certificate

active

08065573

ABSTRACT:
Various embodiments include an apparatus comprising a memory device including a plurality of addressable memory locations, and a memory manager coupled to the memory device, the memory manager including a scheduling unit and a histogram data structure including a plurality of counters, the scheduling unit operable to detect a single-bit error in data read from the memory device, and to increment a value in a particular one of the plurality of counters, the particular one of the plurality of counters corresponding to the particular bit in the accessed data which incurred the single-bit error in the read data.

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“U.S. Appl. No. 11/693,572, Non Final Office Action mailed Mar. 2, 2011”, 26 pgs.

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