Method and apparatus for thermal processing of semiconductor sub

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373118, F27D 1100

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061335509

ABSTRACT:
An improved apparatus and method for thermal processing of semiconductor wafers. The apparatus and method provide the temperature stability and uniformity of a conventional batch furnace as well as the processing speed and reduced time-at-temperature of a lamp-heated rapid thermal processor (RTP). Individual wafers are rapidly inserted into and withdrawn from a furnace cavity held at a nearly constant and isothermal temperature. The speeds of insertion and withdrawal are sufficiently large to limit thermal stresses and thereby reduce or prevent plastic deformation of the wafer as it enters and leaves the furnace. By processing the semiconductor wafer in a substantially isothermal cavity, the wafer temperature and spatial uniformity of the wafer temperature can be ensured by measuring and controlling only temperatures of the cavity walls. Further, peak power requirements are very small compared to lamp-heated RTPs because the cavity temperature is not cycled and the thermal mass of the cavity is relatively large. Increased speeds of insertion and/or removal may also be used with non-isothermal furnaces.

REFERENCES:
patent: 3723053 (1973-03-01), Myers et al.
patent: 3737282 (1973-06-01), Hearn et al.
patent: 4081313 (1978-03-01), McNeilly et al.
patent: 4417347 (1983-11-01), Muka et al.
patent: 4468195 (1984-08-01), Sasaki et al.
patent: 4481406 (1984-11-01), Muka
patent: 4496609 (1985-01-01), McNeilly et al.
patent: 4507078 (1985-03-01), Tam et al.
patent: 4518349 (1985-05-01), Tressler et al.
patent: 4540876 (1985-09-01), McGinty
patent: 4555273 (1985-11-01), Collins et al.
patent: 4649261 (1987-03-01), Sheets
patent: 4698486 (1987-10-01), Sheets
patent: 4770630 (1988-09-01), Akimoto et al.
patent: 4777022 (1988-10-01), Boldish et al.
patent: 4794217 (1988-12-01), Quan et al.
patent: 4818327 (1989-04-01), Davis et al.
patent: 4857689 (1989-08-01), Lee
patent: 4891335 (1990-01-01), McNeilly
patent: 4898834 (1990-02-01), Lockwood et al.
patent: 4909314 (1990-03-01), Lamont, Jr.
patent: 4914276 (1990-04-01), Blair
patent: 4943234 (1990-07-01), Sohlbrand
patent: 5001327 (1991-03-01), Hirasawa et al.
patent: 5011794 (1991-04-01), Grim et al.
patent: 5040484 (1991-08-01), Mears et al.
patent: 5043300 (1991-08-01), Nulman
patent: 5048800 (1991-09-01), Miyazaki et al.
patent: 5059770 (1991-10-01), Mahawili
patent: 5060354 (1991-10-01), Chizinsky
patent: 5207573 (1993-05-01), Miyagi et al.
patent: 5219798 (1993-06-01), Kamakura
patent: 5252807 (1993-10-01), Chizinsky
patent: 5343012 (1994-08-01), Hardy et al.
patent: 5387557 (1995-02-01), Takagi
patent: 5429498 (1995-07-01), Okase et al.
patent: 5430271 (1995-07-01), Orgami et al.
patent: 5445676 (1995-08-01), Takagi
patent: 5520742 (1996-05-01), Ohkase
patent: 5536918 (1996-07-01), Ohkase et al.
patent: 5680502 (1997-10-01), Kim
patent: 5695654 (1997-12-01), Imahashi
patent: 6002109 (1999-12-01), Johnsgard et al.
M. Murphy, "Statement of Inventorship," Mar. 3, 2000.
F. Roozeboom, Manufacturing Equipment Issues in Rapid Thermal Processing, 1993, Academic Press, Inc., ISBN 0-12-247690-5, pp. 349-423.
R. Sheets, Automatic Cassette to Cassette Radiant Impulse Processor, Nuclear Instruments and Methods in Physics Research B6 (1985) 219-223, North-Holland, Amsterdam.
A. Shimizu et al., Reduced Thermal Budget Process Using a New Concept Single Wafer Reactor, 1st Internat'l RTP Conf. RTP'93, Sep. 1993, Scottsdale, AZ, pp. 324-328.
Proximity Heating for Rapid Thermal Processing (RTP), SEMATECH Technology Transfer 95012698-XFR.
S.K. Griffiths et al., "Analyses of Wafer Support and Transport Processes for 300 mm Wafers," 6.sup.th. International Conference on 300 mm Wafer Specification, SEMICON/Japan, Tokyo, Japan, Dec. 5, 1996.
S.K. Griffiths et al., "Thermal Gradients, Gravitational Stress and Plastic Deformation in Large Wafers," 3.sup.rd Intern'l Workshop on 300 mm Wafer Specification, SEMICON/WEST, San Francisco, CA, Jul. 10, 1995.
H.R. Huff et al., "Challenges and Opportunities for Dislocation-Free Wafer Fabrication and Thermal Processing: An Historical Review," 3.sup.rd Intern'l RTP Conf, Amsterdam, Netherlands, Aug. 30, 1995.
A. Dip, "Thermal Processing of 300 mm Substrates: Thermal Process Issues," Second Large Diameter Wafer Thermal Issues Conference, Austin, TX, Sep. 25, 1996.
R.H. Nilson et al., "Scaling Batch Processes for Large Wafer Diameters," Second Large Diameter Wafer Thermal Issues Conference, SEMATECH, Austin, TX, Sep. 25, 1996.
R.H. Nilson et al., "Thermal Gradients, Gravitational Stress and Plastic Deformation in Large Wafers," Wafer Defect & Engineering Topical Conf. on Large Diameter Wafer & Thermal Stress Issues, Austin, TX, Sep. 27, 1995.
B. Leroy et al., "Warpage of Silicon Wafers,", J. Electrochem. Soc., vol. 127, No. 4, pp 961-970, Apr. 1980
R. H. Nilson et al., "Scaling wafer stresses and thermal processes to large wafers," Thin Solid Films, 315 (1998), pp 286-293.
G. Bertini et al., "Defects introduced in silicon wafers during rapid isothermal annealing: Thermoelastic and thermoplastic effects," J. Appl. Phys., 56 (10), pp. 2922-2929, Nov. 1984.
M. Suezawa et al., "Dislocation Dynamics in the Plastic Deformation of Silicon Crystals," Phys. Stat. Sol., 51, 217, 1979.
B. DeHart et al., "New developments in rapid thermal processing," Solid State Tech., Feb. 1996, pp 107-110.
K.G. Reid et al., "Rapid thermal processing for ULSI applications: An overview," Solid State Tech., Feb. 1996, pp 63-74.
R.T. Fulks et al., "Rapid isothermal annealing of ion implantation damage using a thermal radiation source," Appl. Phys. Lett. 39(8), Oct. 15, 1981, pp. 604-606.
D. Aitken et al., A New VLSI Compatible Rapid Thermal Processing System, Elsevier Science Publishers B.V., 0168-583X/87.

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