Method and apparatus for testing semiconductor wafers

Details Method and apparatus for testing semiconductor wafers Method and apparatus for testing semiconductor wafers

2005-02-01

2005-02-01

Siek, Vuthe (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C324S500000, C324S754090, C438S017000

Reexamination Certificate

active

06851096

ABSTRACT:
A wafer testing apparatus comprises a sample chuck having a flat surface for supporting a test wafer positioned thereon, the sample chuck having a base structure manufactured of a conductive metal and having a semiconductor layer secured to the base structure defining the flat surface of the sample chuck, an electrical test probe establishing a correction factor corresponding to a location on the semiconductor layer surface to be used to report an electrical property at a location on a test wafer substantially unaffected by the electrical properties of the semiconductor layer and base structure below that location.

REFERENCES:
patent: 3628137 (1971-12-01), Mazur
patent: 6291254 (2001-09-01), Chou et al.
patent: 6365436 (2002-04-01), Faraci et al.
patent: 6429145 (2002-08-01), Hovel
patent: 20020180474 (2002-12-01), Howland et al.

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